White Paper

High-Level Synthesis: A Comprehensive Guide

Authors:

  • IASR

  • ias-research.com

Abstract

High-level synthesis (HLS) is a powerful design methodology that allows designers to create hardware implementations from high-level behavioral descriptions. This white paper provides a comprehensive overview of HLS, including its benefits, workflow, tools, and applications.

Introduction

Traditional hardware design involves manually creating circuits at the gate level, which can be a time-consuming and error-prone process. High-level synthesis (HLS) offers a more efficient and productive approach by allowing designers to specify their hardware designs using high-level programming languages. HLS tools can then automatically generate the corresponding hardware implementation.

Benefits of HLS

  • Reduced Design Time: HLS can significantly reduce design time by automating many of the tedious tasks involved in traditional hardware design.

  • Increased Design Productivity: By focusing on high-level behavior, designers can be more productive and explore different design options more easily.

  • Improved Design Quality: HLS tools can help ensure design correctness and optimize for performance, power, and area.

  • Faster Time-to-Market: HLS can accelerate the development process, allowing products to be brought to market more quickly.

HLS Workflow

  1. Behavioral Specification: The designer writes a behavioral description of the desired hardware using a high-level language, such as C, C++, or SystemC.

  2. Synthesis: The HLS tool analyzes the behavioral description and generates a corresponding hardware implementation, typically in the form of a register-transfer level (RTL) description.

  3. Optimization: The HLS tool can optimize the generated hardware for various criteria, such as performance, power, or area.

  4. Verification: The synthesized hardware is verified using simulation or other verification techniques to ensure its correctness.

  5. Implementation: The synthesized hardware is implemented on a target platform, such as an FPGA or ASIC.

HLS Tools

There are many HLS tools available, each with its own strengths and weaknesses. Some popular HLS tools include:

  • Vivado HLS from Xilinx

  • Vitis HLS from Xilinx

  • Catapult HLS from Synopsys

  • LegUp HLS from Cadence

HLS Applications

HLS is used in a wide range of applications, including:

  • Digital Signal Processing (DSP)

  • Computer Vision

  • Machine Learning

  • Custom Computing Accelerators

  • SoC Design

High-Level Synthesis from Algorithm to Digital Circuit

The book High-Level Synthesis from Algorithm to Digital Circuit by Andreas Gerstlauer provides a comprehensive introduction to HLS, covering both theoretical concepts and practical applications. The book discusses the various stages of the HLS process, including behavioral specification, synthesis, optimization, and verification. It also presents case studies and examples to illustrate the application of HLS in real-world designs.

Conclusion

High-level synthesis is a powerful tool for designing complex hardware systems. By automating many of the tedious tasks involved in traditional hardware design, HLS can significantly reduce design time and improve design quality. As HLS tools continue to evolve, they are likely to become even more essential for designing modern electronic systems.

References

  • High-Level Synthesis from Algorithm to Digital Circuit by Andreas Gerstlauer. Springer, 2012.

  • Vivado Design Suite User Guide: High-Level Synthesis from Xilinx.

  • Vitis Unified Software Platform User Guide from Xilinx.

  • Catapult HLS User Guide from Synopsys.

  • LegUp HLS User Guide from Cadence.

  • Digital Systems Design: An Introduction to Programming and Computer Architecture by David Harris and Sarah Harris. Morgan Kaufmann, 2021.

  • Computer Architecture: A Quantitative Approach by John L. Hennessy and David A. Patterson. Morgan Kaufmann, 2017.

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